Samsung Advanced Institute of Technology

While digital computing of neural nets^1-3 is responsible for the commercial success of artificial intelligence (AI), analog approaches to neural net computing are being hotly pursued for low-power AI. Notably, in-memory computing seeks to reduce power dissipation by executing multiply-accumulate (MAC) operations？？which are intense in neural net computing？？in an analog manner using crossbar arrays of memories^4-7, in particular non-volatile memories (NVMs). Of the four, volume-producible NVMs？？resistive memory^8-13, phase-change memory^14,15, flash memory^16-19, and spin-transfer-torque magnetoresistive random access memory (MRAM)^20-22？？, the first three are vigorously used for crossbar arrays, but no crossbar array has been implemented with the MRAM despite its performance merits⁵. The difficulty is the MRAM’s low resistance, with which the conventional crossbar array would consume a considerable power, defeating the purpose. Here we bridge this gap and realize an MRAM crossbar array, overcoming the low-resistance issue with a new architecture that replaces the standard current sum with resistance sum in the analog MAC operation. This 64 × 64 array and its readout electronics are co-integrated in 28-nm CMOS technology. We operate this array fully for a 2-layer perceptron to classify 10,000 MNIST digits with a 93.23 ± 0.05％ accuracy (software baseline: 95.24％). This accuracy rises to 98.86 ± 0.06％ (software baseline: 99.28％) in an 8-layer VGG-8 neural net emulated with the measured noise. Moreover, a 10-layer neural net partly employing the array detects faces from 2,000 scenes with mask-off faces and 500 scenes with mask-on faces with a 93.4％ accuracy. This advance shepherds the cutting-edge CMOS-embedded MRAM technology into the in-memory computing and expands its forefront.