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Scalable van der Waals integration of III-N devices over 2D materials for CMOS-compatible architectures

Journal
Advanced Materials
Date
2025.03.11
Abstract

Abstract

Over the past fifty years, advance in semiconductor technology has been driven by exponentially reducing the size of silicon transistor and even pushing the quantum limit.; however, continued scaling, so called Moore’s law, is becoming extremely difficult. Instead, recent advances in monolithic and heterogeneous integration exploring non-group IV materials envision beyond complementary metal-oxide semiconductor (CMOS) scaling by adding functional diversification. Here we introduce multi-dimensional heterogeneous integration technology using all CMOS back-end of line compatible processes: Vertical 3D and lateral 2D integration of III-N devices, 2D materials (graphene and molybdenum disulfide) and CMOS. Advanced fluidic-assisted transfer (FAST) of freestanding III-N high electron mobility transistors (HEMTs) and micro-light-emitting-diodes (micro-LEDs) onto both 2D materials and CMOS is achieved by van der Waals (vdW) integration. The advanced FAST provides less than 1 μm process margin and higher than 99 % yield as analyzed on a 200 mm wafer scale, which can be trusted heterogeneous integration. The freestanding III-N chips are found to be vdW integrated onto the 2D materials, and the vdW interfaced multilayer graphene successfully functions as a back-gating interconnect line. The unique four-fold rotational symmetric design of GaN HEMTs not only makes their massive and random FAST compatible, but exhibits competitive performance compared with a conventional HEMT structure. Consequently, GaN-based radio-frequency power and cascode GaN/Si transistors are integrated on SOI-CMOS. This approach embraces a clear advantage in breaking through the physical limits and looking for the functional diversification toward ‘More than Moore’.

Reference
Adv. Mater. 2420060 (2025)
DOI
https://doi.org/10.1002/adma.202420060